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PhD DefenseEnhancing Quantum Computing Efficiency: Compilation Strategies Leveraging Algorithmic and Hardware Insights |
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Tuesday, December 17, 2024, 10:00am - 12:00pm |
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Speaker: Yuwei Jin
Location : CoRE 305
Committee:
Professor Zheng Zhang
Professor Mario Szegedy
Professor Yipeng Huang
Professor Kate Smith (external)
Event Type: PhD Defense
Abstract: Quantum computing has rapidly advanced, with diverse quantum devices such as superconducting qubits, trapped ions, neutral atoms, and photonic chips. Since Richard Feynman's 1981 proposal, significant algorithms—including Shor's algorithm, Grover's search, and Variational Quantum Algorithms (VQAs)—have been developed, underscoring the need for efficient systems that bridge high-level algorithms and hardware implementations. Quantum algorithms, typically expressed in high-level languages, are transformed into logical circuits, then mapped onto physical circuits using hardware-specific basis gates via qubit mapping and routing, and finally executed through control pulses. Future quantum systems are expected to incorporate error correction codes to enhance computational reliability.My research focuses on algorithm-specific compilation with cross-stack optimization to enhance the efficiency of quantum program execution on existing hardware. I explore optimization opportunities arising from gate commutativity in algorithms like the Quantum Approximate Optimization Algorithm (QAOA) and Quantum Fourier Transform (QFT), as well as flexibility in circuit synthesis for Variational Quantum Eigensolver (VQE) algorithms. Additionally, I analyze often-overlooked hardware characteristics, such as the regularity of qubit connectivity in modern quantum devices, to inform compilation strategies.By studying gate commutativity and qubit connectivity, we discovered a compilation pattern for QAOA achieving linear circuit depth for clique graphs. Building upon this, we developed a general framework adaptable to practical cases, effectively handling sparsity of problem graphs and hardware noise variability. This led to up to 72% reduction in circuit depth and 66% reduction in gate count on IBM and Google architectures with up to 1,024 qubits, outperforming baselines in experiments on IBM Mumbai.We extended this to QFT compilation, resulting in the first linear-depth QFT circuits for architectures like Google Sycamore, IBM heavy-hex, and 2D grids with arbitrary qubit counts. Our methods overcome limitations of techniques relying on SAT solvers or heuristics, which often suffer from long compilation times or suboptimal outcomes due to large search spaces.In another contribution, we introduced Tetris, a compilation framework for VQA applications. Tetris focuses on reducing two-qubit gates during compilation, as these have higher error rates and execution times. By exploiting opportunities in circuit synthesis and using a refined intermediate representation of Pauli strings, Tetris reduces two-qubit gate counts and mitigates hardware mapping costs through a fast bridging approach. Overall, Tetris achieves reductions of up to 41.3% in CNOT gate counts, 37.9% in circuit depth, and 42.6% in circuit duration across molecular simulations compared to state-of-the-art approaches.The methodologies and insights from my research are not limited to these three scenarios; they can be applied to future quantum program compilation tasks. By focusing on cross-stack optimization and leveraging both algorithmic properties and hardware characteristics, my work contributes to bridging the gap between quantum algorithms and hardware, significantly improving the efficiency and scalability of quantum computing implementations.
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Contact Professor Zheng Zhang
Zoom: https://rutgers.zoom.us/j/94585647230?pwd=HKvj6OP2405fBqwunZJNuPCV1cYkbS.1
