Computer Science Department Colloquium
Architecting Persistent Memory Systems
Wednesday, May 24, 2017, 10:30am
Persistent Memory (PM) technologies (also known as Non-Volatile RAM, e.g., Intel’s 3D XPoint) offer the exciting possibility of disk-like durability with the performance of main memory. Persistent memory systems provide applications with direct access to storage media via processor load and store instructions rather than having to rely on performance sapping software intermediaries like the operating system, aiding the development of high-performance, recoverable software. For example, I envision storage software that provides the safety and correctness of a conventional database management system like PostgreSQL and the performance of an in-memory store like Redis. However, today’s computing systems have been optimized for block storage devices and cannot fully exploit the benefits of PMs. Designing efficient systems for this new storage paradigm requires a careful rethink of computer architectures, programming interfaces, and application software.
While maintaining recoverable data structures in main memory is the central appeal of persistent memories, current systems do not provide efficient mechanisms (if any) to do so. Ensuring the recoverability of these data structures requires constraining the order of PM writes, whereas current architectures are designed to reorder memory accesses, transparent to the programmer, for performance. In this talk, I will introduce recently proposed programming interfaces, called persistency models, that will allow programmers to express the required order of PM writes. Then, I will present my work on developing efficient hardware implementations to enforce the PM write order prescribed by persistency models and tailoring software for these new programming interfaces.
Speaker: Aasheesh Kolli
Aasheesh Kolli is a doctoral candidate in Computer Science and Engineering at the University of Michigan. He investigates application software, programming interfaces, and computer architectures in light of emerging persistent memory technologies. His wor
Location : CoRE A 301
Event Type: Computer Science Department Colloquium
University of Michigan/Penn State